1. Field of the Invention
The present invention relates to adaptively scaling parameters which are used by a processor to enter a low power mode. The inventive adaptive scaling technique assists in optimizing the total power consumption of the processor.
2. Background Art
A processor enters a low power mode to save power based on a duration of its operating state being idle. In particular, when the processor expects to remain idle for a duration less than a fixed “break-even” time, the processor enters a wait-for-interrupt (WFI) mode to save power. Alternatively, when the processor expects to remain idle for a duration greater than the fixed break-even time, the processor enters a dormant mode to save additional power. The break-even time is the minimum duration of idle time required to elapse before the processor can enter the dormant mode.
Different techniques are used to save power in the above-mentioned low power modes. For example, in the WFI mode, the power required to switch components of the processor is reduced by clocking the gates of the switching components. Further, in the dormant mode, in addition to clocking the gates of the switching components, leakage currents are reduced by turning off certain components (e.g., SRAM memory) supported by the processor to save leakage power. Therefore, there are additional power savings in the dormant mode than in the WFI mode. However, there is a greater latency associated with transitioning from the dormant mode to the active (non-idle) mode than a latency associated with transitioning from the WFI mode to the active mode because more energy (power) is required to transition from the dormant mode to the active mode than is required to transition from the WFI mode to the active mode. This is because the components (e.g., SRAM memory) that were turned off need to be woken up and registers associated with turned off components need to be restored. If the processor enters the dormant mode when it expects to remain idle for a duration less than the fixed break-even time, there is a penalty, in terms of power loss, to a transition out of the dormant mode.
In summary, the processor enters the WFI mode or the dormant mode to save power based on the duration of the break-even time. In conventional systems, the duration of the break-even time is fixed. That is, in operation, the duration of the break-even time cannot be changed or updated to adjust according to operation parameters of the processor. This is undesirable. Further, the duration of break-even time is conventionally fixed based on the worst-case conditions of operating voltage, operating temperature, and the process corner within which the processor is designated to operate. However, such a fixing of the duration of break-even time is inefficient and does not provide optimum power savings.
Accordingly, there is a need for the duration of the break-even time to be adjustable during operation of the processor to provide optimum power savings.
The present invention will be described with reference to the accompanying drawings. The drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.